Parylene with different functional groups as a passivation layer for highly stable a-IGTO thin-film transistors
- Authors
- Jung, Moonil; Hong, Jin-Hwan; Choi, Jong-Hyuk; Kim, Moonsoo; Lee, Kyeongbae; Kim, Dongbhin; Choi, Byoungdeog
- Issue Date
- May-2025
- Publisher
- Elsevier Ltd
- Keywords
- Amorphous oxide semiconductor; Parylene; Passivation layer; Thin-film transistor; Threshold voltage shift
- Citation
- Materials Science in Semiconductor Processing, v.190
- Indexed
- SCIE
SCOPUS
- Journal Title
- Materials Science in Semiconductor Processing
- Volume
- 190
- URI
- https://scholarx.skku.edu/handle/2021.sw.skku/120496
- DOI
- 10.1016/j.mssp.2025.109325
- ISSN
- 1369-8001
1873-4081
- Abstract
- A passivation layer on thin-film transistors (TFTs) plays a role in suppressing defects caused by back-channel penetration of moisture, oxygen, and various gases from the external environment. Among passivation layer materials, polymers can be applied on flexible electronic devices and are relatively easy to fabricate. Herein, we employed parylene-N, parylene-C, and parylene-F as passivation layers on amorphous indium–gallium–tin oxide (a-IGTO) TFTs to improve their electrical characteristics and reliability. Compared to bare a-IGTO TFTs, parylene-passivated a-IGTO TFTs showed better field-effect mobilities (μ) and subthreshold swing (SS) as well as more stable threshold voltage shift (ΔVth). In various stress tests (bias, illumination, and thermal), parylene-passivated a-IGTO TFTs showed higher stability than bare a-IGTO TFTs toward bias stress, illumination, and high temperature. The functional groups in the parylene passivation layer modified metal-oxide bonds, facilitating carrier transport and reducing oxygen vacancies that act as charge-trapping sites at the gate dielectric/channel interface. Furthermore, a water-soaking test was conducted on the bare and parylene-passivated a-IGTO TFTs for up to 12 h, confirming stable transfer characteristics throughout the duration in parylene-passivated a-IGTO TFTs. © 2025
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