ScholarWorks@성균관대학교

초록

The relentless scaling of semiconductor devices demands robust and low-resistance metal-semiconductor contacts, wherein interfacial diffusion and poor adhesion often degrade performance. Herein, we propose a vertically aligned TiS2 layer (VATL) synthesized via a low-temperature H2S plasma treatment as an effective diffusion barrier and adhesion promoter between Ti and metal electrodes. The VATL physically decouples Ti from W, suppressing interfacial alloying and enhancing W grain crystallinity. Cross-sectional transmission electron microscopy analysis confirms a distinct layered TiS2 interface with an increased d-spacing (0.31 nm), while in-depth X-ray photoelectron spectroscopy validates significant suppression of Ti diffusion under optimized plasma conditions. Furthermore, X-ray diffraction analysis reveals enhanced W grain growth enabled by VATL, leading to a dramatic reduction in the contact resistance. Four-point probe measurements show that optimized VATL/W structures exhibit lower sheet resistance compared to conventional Ti/W interfaces from 1510.24 +/- 0.92 to 1172.87 +/- 3.79 Omega/cm(2), and diode devices with VATL contacts demonstrate a 17.93 A/A-fold increase in ON current without introducing hysteresis. Finally, we explore the reliability of the VATL via a long-term stability test and a thermal stability test. Our findings establish a scalable and CMOS-compatible strategy using vertically aligned two-dimensional sulfides to engineer high-performance metal interfaces for next-generation nanoelectronic devices.

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