ScholarWorks@성균관대학교

초록

As the automotive domain advances toward Software-Defined Vehicles (SDVs) and zonal architectures, central gateways must deliver predictable timing while handling heterogeneous protocols and bursty workloads [1], [2]. In heterogeneous multicore (HMP) platforms that combine application processors (AP) for feature-rich services with microcontroller (MCU) cores for real-time control, shared-memory Inter-Process Communication (IPC) becomes a key design element.This paper analyzes the effect of IPC instance partitioning on tail-latency behavior in a CAN-to-Ethernet gateway implemented on an NXP S32G3-class platform. Two execution models are compared under equal total load: a single-instance configuration that serves the entire workload, and a partitioned multi-instance configuration that splits the workload evenly across two identical forwarding tasks. Evaluation uses batch-level latency statistics - mean, P95, P99, P99.9, jitter, drop rate - and examines background conditions ranging from idle to contended.Results show that partitioning substantially suppresses high percentiles while keeping the mean comparable [3]. Empirical cumulative distribution functions (ECDFs) confirm a leftward shift of the upper tail, and deadline-based SLO compliance improves across practical thresholds. A compact ablation indicates that common operational tunings (e.g., IRQ affinity, CPU governor) provide smaller marginal gains relative to instance partitioning. These findings position IPC instance partitioning as an effective operational lever for improving predictability in HMP automotive gateways.