상세 보기
- Choi, Da Eun;
- Park, Hyokwang;
- Choi, Hyungyu;
- Choi, Seon Yeon;
- Kang, Boseok;
- 외 1명
WEB OF SCIENCE
0SCOPUS
1초록
Two-dimensional material-based vertical field-effect transistors (VFETs) have recently garnered significant attention for their potential to enable straightforward formation of ultrashort channel lengths below a nanometer. However, their performance is often limited by unintended leakage currents arising from negative threshold voltages (V-th) and the existence of gate-field-free regions (GFFRs). To address this challenge, leakage currents through the GFFRs must be effectively suppressed under a zero gate bias. In this study, we demonstrate high-performance n-channel MoSe2 VFETs with effective leakage current suppression through GFFRs, achieving on/off current ratios exceeding 10(5). A vacuum pre-annealing process enables the formation of a low-defect-density MoSe2 channel with a near-zero V-th, thereby significantly reducing the leakage currents. Furthermore, the integration of high-work-function VSe2 as a drain electrode forms a defect-free van der Waals contact, suppressing the tunneling currents in the gate-modulated region. As a result, the defect-engineered MoSe2 VFET exhibited an on/off ratio that was 3 orders of magnitude higher than that of the leakage-prone MoS2 VFET. These findings provide valuable insights into charge transport mechanisms and defect-suppression strategies, laying the foundation for advancements in next-generation VFET technologies.
키워드
- 제목
- High-On/Off-Ratio Vertical Transistors with Defect-Engineered MoSe2 and van der Waals VSe2 Contacts
- 저자
- Choi, Da Eun; Park, Hyokwang; Choi, Hyungyu; Choi, Seon Yeon; Kang, Boseok; Kim, Hyun Ho
- 발행일
- 2025-10
- 유형
- Article
- 저널명
- ACS Nano
- 권
- 19
- 호
- 40
- 페이지
- 35601 ~ 35608