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A Phase-Locked Minimum-Energy-Point-Tracking Enabled by Unified-Clock-Power-and-Body-Bias Slack Regulation and PI-Ratio Based In-Situ Loop Gain Optimization with 97.4% Supply Voltage Margin Recovery at Minimum-Energy-Point in 28nm FDSOI
- Jeong, Minhyeok;
- Gi, Hyungmin;
- Cho, Minsik;
- Kim, Mingyu;
- Kim, Donggyu;
- ... Lee, Yoonmyung;
- 외 7명
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1초록
Energy efficiency is a primary goal in modern digital system design, especially as IoT, mobile, and AI applications demand low power consumption alongside high performance. To optimize energy consumption, both supply voltage (VDD) and threshold voltage (Vth) need to be tuned to operate at the Minimum Energy Point (MEP), where dynamic energy (Edyn) and leakage energy (Eleak) are optimally balanced[1]. Achieving MEP under varied environmental and workload conditions is essential for sustaining energy-efficient performance across diverse applications, driving the need for Minimum Energy Point Tracking (MEPT) mechanisms [2]-[6]. © 2025 IEEE.
- 제목
- A Phase-Locked Minimum-Energy-Point-Tracking Enabled by Unified-Clock-Power-and-Body-Bias Slack Regulation and PI-Ratio Based In-Situ Loop Gain Optimization with 97.4% Supply Voltage Margin Recovery at Minimum-Energy-Point in 28nm FDSOI
- 저자
- Jeong, Minhyeok; Gi, Hyungmin; Cho, Minsik; Kim, Mingyu; Kim, Donggyu; Park, Sungyong; Lee, Woonjae; Kim, Seonho; Yoon, Yeohoon; Han, Shin; Seo, Donguk; Lee, Jongmin; Lee, Yoonmyung
- 발행일
- 2025
- 유형
- Conference paper
- 저널명
- Proceedings of the Custom Integrated Circuits Conference