ScholarWorks@성균관대학교

초록

This paper presents a co-optimization framework that pairs a Delta-Sigma Modulator (DSM) with a cascaded integrator-comb (CIC) decimator. The core idea is to incorporate the decimator design into a DSM design, whereas prior works benchmark the modulator in isolation. Our result shows that the decimator power consumption is not negligible, and the oversampling ratio (OSR) of the DSM is a key factor in determining decimator power. This reveals the true cost of the complete analog-to-digital converter (ADC), including a decimator, providing designers with a quantitative guideline for early-stage trade-off analysis.

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