Hf/Zr Superlattice-Based High-κ Gate Dielectrics with Dipole Layer Engineering for Advanced CMOS
  • Song, Taeyoung
  • Kang, Sanghyun
  • Kuo, Yu-Hsin
  • Chen, Jiayi
  • Fernandes, Lance
  • ... Baac, Hyoung Won
  • 외 4명
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초록

Advanced logic transistors require gate dielectrics that achieve subnanometer equivalent oxide thickness (EOT), suppress leakage, and satisfy three key requirements: (i) compatibility with RMG-like high-temperature processing, (ii) sufficient V-th tunability for multi-V-th design, and (iii) high device reliability. However, meeting all of these requirements at once has been difficult with conventional high-kappa systems. In this work, we demonstrate that our Hf/Zr-based gate stacks quantitatively satisfy these conditions. (i) After a 700 degrees C N-2 anneal, the HZH superlattice achieves EOT = 7.3 angstrom, lower than conventional HfO2-only stacks (8.5 angstrom) while maintaining comparable leakage. (ii) Embedding a 3 angstrom Al2O3 dipole within the HfO2/ZrO2/HfO2 superlattice (HZHA) breaks the conventional dipole trade-off, achieving an 8.4 angstrom EOT-lower than the 9.0 angstrom of a standard HfO2/Al2O3 stack-while providing a > 200 mV V-FB shift, thereby enabling multi-V-th tuning without compromising scaling. (iii) Furthermore, under -2 V negative-bias temperature stress at 125 degrees C for 100 s, HZHA and HA exhibit comparable V-FB drifts of 87 mV and 97 mV, respectively, confirming that strong V-th tunability and subnanometer EOT can be achieved without compromising stability. In addition to these quantitative advances, this study reveals previously unreported physical insights into the dipole behavior and interfacial diffusion in ultrathin Hf/Zr multilayers. These results establish HZHA as an RMG-compatible, V-th-tunable, low-EOT dielectric platform capable of supporting logic scaling beyond the 1 nm frontier.

키워드

ultrathin high-kappasuperlatticedipoleengineeringreliabilityRMG processGAAFETMOS DEVICESRELIABILITYSTABILITYHAFNIUM
제목
Hf/Zr Superlattice-Based High-κ Gate Dielectrics with Dipole Layer Engineering for Advanced CMOS
저자
Song, TaeyoungKang, SanghyunKuo, Yu-HsinChen, JiayiFernandes, LanceAfroze, NashrahTian, MengkunBaac, Hyoung WonShin, ChanghwanKhan, Asif Islam
DOI
10.1021/acsnano.5c15062
발행일
2026-01-20
유형
Article
저널명
ACS Nano
20
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2092 ~ 2103