ScholarWorks@성균관대학교

초록

An area-efficient, high-resolution CMOS light detection and ranging (LiDAR) capable of generating $400\times 112$ depth images is proposed. This sensor employs a rolling-scan architecture that is compatible with a row-addressable solid-state LiDAR system. To achieve high resolution, a single-photon avalanche diode (SPAD) analog front-end (AFE) circuit was implemented using only five nMOS transistors. A reconfigurable-resolution (RR) hTDC, capable of converting one-/two-channel signals with variable time resolutions of 1, 2, or 4 ns, is further proposed to implement a 400-channel histogramming time-to-digital converter (hTDC) with low memory overhead. The sensor leverages RR-hTDC to support two image resolution modes: macro and quadruple resolution (QR). In the macro mode, $200\times 56$ depth images can be acquired with a 1-ns time resolution. In the QR mode, the sensor can achieve $400\times 112$ high-resolution depth images with a 2-ns time resolution. In the range-enhanced (RE) mode, the time resolution is halved for distances beyond 100 m, enabling the detection range to be extended up to 200m. A laser profile-based depth refining (DR) filter was used to compensate for the reduction in time resolution and ensure sub-centimeter time resolution, improving depth precision by 40% compared with the conventional QR mode. The prototype LiDAR sensor was fabricated as a 90-nm CMOS image sensor (CIS) process. In outdoor conditions under 135-klx sunlight, the worst case depth precision and accuracy for distances of 15-60 m were measured as 10 and 17 cm, respectively. Moreover, a relative precision of less than 0.18% was achieved over a 60-130-m range under 90-klx sunlight. The total power consumption of the sensor was measured to be 572 mW when operating at 20 frames/s under 70-klx sunlight.

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