Efficient neural network acceleration using redundant residue number systems

초록

Neural networks have become a fundamental computational component in modern systems ranging from edge intelligence and autonomous platforms to large-scale data analytics. However, the rapid growth in model complexity has made arithmetic efficiency a critical bottleneck in hardware accelerators. Despite extensive architectural optimizations, conventional binary number systems (BIN) remain inherently constrained by carry propagation in addition and accumulation, leading to increased latency and energy consumption in arithmetic-intensive workloads. By leveraging the redundant residue number system (R-RNS), this paper introduces a previously unexplored arithmetic framework for neural network acceleration. The proposed framework completely eliminates carry propagation through redundancy while increasing arithmetic parallelism via modular residue arithmetic, leading to significant performance improvements. The proposed framework is evaluated at both circuit and system levels. Circuit-level analysis demonstrates improvements in delay, power, and energy-delay product (EDP) for key R-RNS arithmetic units. At the system level, R-RNS processing elements are integrated into representative convolutional neural network (CNN) and vision transformer workloads. Experimental results show up to 27% reduction in computation cycles and up to 6% improvement in EDP compared to binary-based designs, while preserving model accuracy.

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