A 6.25-mW Retina-mimetic CMOS Image Sensor with SPAD-PPD Hybrid Pixel Array for HDR Imaging
  • Lee, Houk
  • Cho, Yongseong
  • Cho, JunHee
  • Lee, Heesung
  • Choi, Jaehyuk
Citations

SCOPUS

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초록

Contemporary CMOS image sensors utilizing pinned-photodiode (PPD) provide high-fidelity images with low noise. However, to achieve an adequate SNR under low-light conditions, the exposure time must be extended, which results in motion blur. Moreover, the limited well capacity of the PPD causes saturation under high-light conditions. Recently, several photon-counting image sensors using single-photon avalanche diodes (SPADs) have been reported. The SPAD offers high sensitivity, which is beneficial for low-light imaging. Moreover, an in-pixel digital counter enables noise-free readout [1, 2]. However, per-pixel digital circuits impede pixel shrinkage. More importantly, power consumption increases significantly due to switching in the per-pixel counter. Several sensors use analog counters that inject unit charge into capacitors to achieve small pixel and low power consumption [3, 4, 5, 6]. Despite the small number of transistors, the analog counter has limitations due to the need for pMOS transistors and nonlinearity. Additionally, the requirement for an ADC results in power consumption overhead. To achieve a high dynamic range (HDR), it is desirable to mimic the human retina, which contains two types of photoreceptor cells: rod-like SPADs that detect low light and cone-like PPDs that detect mid-range light. The SPADs also detect high light due to their non-limited well capacity feature.

제목
A 6.25-mW Retina-mimetic CMOS Image Sensor with SPAD-PPD Hybrid Pixel Array for HDR Imaging
저자
Lee, HoukCho, YongseongCho, JunHeeLee, HeesungChoi, Jaehyuk
DOI
10.1109/A-SSCC67472.2025.11349610
발행일
2025
유형
Conference Paper
저널명
2025 IEEE Asian Solid-State Circuits Conference, A-SSCC 2025 - Proceedings
페이지
205 ~ 207