상세 보기
- Belz, Matthew R.;
- Lee, Seungjong;
- Kangaslahti, Pekka;
- Laun, Michael;
- Kang, Taewook;
- 외 1명
SCOPUS
0초록
This paper presents a robust Quadrature Bitstream Integration (QuBI-CT Δ Σ) phasemeter in 40nm LP CMOS that achieves sub- 1° degree phase error across the 0°-360° input range and 0° C to 70° C temperature range. The phasemeter utilizes a third order CT Δ Σ modulator and accumulating digital backend to form I and Q components of the input waveform. For improved linearity the CT Δ Σ modulator utilizes feedforward resistive DACs and a single-bit quantizer. To reduce the effects of flicker noise, chopping in the first amplifier stage is used. Using a 1 kHz input tone the modulator achieves a SNDR of 68.9 dB and has an oversampling ratio of 256 and bandwidth of 4 kHz. The ADC consumes 112 μ W and the Quadrature Bitstream Integration consumes 200 nW. The prototype design consumes 27.7nJ/ reading and occupies only 0.094mm2
키워드
- 제목
- A Quadrature Bitstream Integration CT Δ Σ Based Multiplier-Free Phasemeter (QuBI-CT Δ Σ)
- 저자
- Belz, Matthew R.; Lee, Seungjong; Kangaslahti, Pekka; Laun, Michael; Kang, Taewook; Flynn, Michael P.
- 발행일
- 2025
- 유형
- Conference Paper
- 저널명
- Midwest Symposium on Circuits and Systems
- 페이지
- 538 ~ 542